View AS27C256A-70JI_6646205.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 1 austin semiconductor, inc. features ? organized 32,768 x 8 ? single +5v 10% power supply ? pin-compatible with existing 256k rom?s and eprom?s ? all inputs/outputs fully ttl compatible ? power-saving cmos technology ? very high-speed flashrite pulse programming ? 3-state output buffers ? 400-mv dc assured noise immunity with standard ttl loads ? latchup immunity of 250 ma on all input and output pins ? low power dissipation (cmos input levels) -active - 165mw worst case -standby - 1.7mw worst case (cmos-input levels) * future high speed offerings: 55ns, 70ns, 90ns options marking ? timing 120ns access -12 150ns access -15 170ns access -17 200ns access -20 250ns access -25 ? package(s) ceramic dip (600mils) j no. 110 ceramic lcc (450 x 550 mils) eca no. 208 ? operating temperature ranges military (-55 o c to +125 o c) m industrial (-40c to +85c) i pin assignment (top view) available as military specifications ? -55c to 125c operation ? military processing methods ? commercial version available 28-pin dip (j) (600 mil) 256k uveprom uv erasable programmable read-only memory for more products and information please visit our web site at www.austinsemiconductor.com p i n n a m e f u n c t i o n a0 - a14 address inputs dq0-dq7 inputs (programming)/outputs e\ chip enable/power down g\ output enable gnd ground v cc 5v supply v pp 13v programming power supply 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v pp a12 a7 a6 a5 a4 a3 a2 a1 a0 dq0 dq1 dq2 gnd vcc a14 a13 a8 a9 a11 g\ a10 e\ dq7 dq6 dq5 dq4 dq3 32-pin lcc (eca) (450 x 550 mils) 4 3 2 1 32 31 30 a12 a14 a10 nc v cc a15 ce2 14 15 16 17 18 19 20 dq2 dq3 v ss dq4 dq5 dq6 dq7 5 6 7 8 9 10 11 12 13 a7 a6 a5 a4 a3 a2 a1 a0 dq1 29 28 27 26 25 24 23 22 21 we a13 a8 a9 a11 oe a10 ce1 dq8 \ \ 6 \ a7 a12 v pp nc v cc a14 a13 a6 a5 a4 a3 a2 a1 a0 nc dq0 dq1 dq2 gnd nc dq3 dq4 dq5 a8 a9 a11 nc g\ a10 e\ dq7 dq6 ? processing ranges military 883 non-compliant equivalent /mil commercial blank
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 2 austin semiconductor, inc. general description the as27c256a series is a set of 262,144 bit, ultraviolet- light erasable, electrically programmable read-only memo- ries. these devices are fabricated using power-saving cmos technology for high speed and simple interface with mos and bipolar circuits. all inputs (including program data inputs) can be driven by series 54 ttl circuits without the use of external pullup resistors. each output can drive one series 54 ttl circuit without external resistors. the data outputs are 3- state for connecting multiple devices to a common bus. the as27c256a is pin-compatible with 28-pin 256k roms and eproms. it is offered in a 600mil dual-in-line ceramic pack- age (j suffix) and a 450 x 550 mil ceramic lcc (eca suffix) rated for operation from -55c to 125c. because this eprom operates from a single 5v supply (in the read mode), it is ideal for use in microprocessor-based sys- tems. one other supply (12.75v) is needed for programming. all programming signals are ttl level. this device is programmable by the amd flashrite pulse programming algorithm. the flashrite pulse programming algorithm uses a v pp of 12.75vv and a v cc of 6.25v for a nominal pro- gramming time of four seconds. for programming outside the system, existing eprom programmers can be used. loca- tions can be programmed singly, in blocks, or at random. functional block diagram* * this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. a0 a1 a2 a3 a4 a5 dq0 a6 dq1 a7 dq2 a8 dq3 a9 dq4 a10 dq5 a11 dq6 a12 dq7 a13 a14 e\ g\ & 10 [pwr dwn] 9 8 7 6 5 4 3 25 24 21 23 2 26 27 20 22 en a a a a a a a a 11 12 13 15 16 17 18 19 eprom 32,768 x 8 0 14 a 0 32,767
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 3 austin semiconductor, inc. operation the seven modes of operation for the as27c256a are listed in table 1. the read mode requires a single 5v supply. all inputs are ttl level except for v pp during programming (12.75v for flashrite pulse), and (12v) on a9 for signature mode. table 1. operation modes read output disable standby programming verify program inhibit e\ v il v il v ih v il v ih v ih g\ v il v ih x v ih v il x v pp x 1 x 1 x 1 v pp v pp v pp v cc v cc v cc v cc +/-.3v v cc v cc v cc a9 x x x x x x v id 2 v id 2 a0 x x x x x x v il v ih mfg device 01h 10h 1 for normal standby & read operation, vpp is don't care x. 2 v id = 12v +/- .5v data out data out high-z high-z data in high-z v cc function (pins) signature mode mode* code** dq0-dq7 v cc v il v il notes: * x can be v il or v ih ** die is amd. user can program on benchtop programmer by selecting am27c256 from the device type selection menu.
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 4 austin semiconductor, inc. read/output disable when the outputs of two or more as27c256a are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from the com- peting outputs of the other devices. to read the output of the selected as27c256a, a low-level signal is applied to e\ and g\. all other devices in the circuit should have their outputs disabled by applying a high-level signal to one of these pins. output data is accessed at pins dq0 through dq7. latchup immunity latchup immunity on the as27c256a is a minimum of 250ma on all inputs and outputs. this feature provides latchup im- munity beyond any potential transients at the printed cir- cuit board level when the eprom is interfaced to industry standard ttl or mos logic devices. input/output layout approach controls latchup without compromising performance or packing density. power down active i cc supply current can be reduced from 25ma (as27c256a-12 through as27c256a-25) to 1ma (ttl-level inputs) or 300a (cmos-level inputs) by applying a high ttl/ cmos signal to the e\ pin. in this mode all outputs are in the high-impedance state. erasure before programming, the as27c256a is erased by exposing the chip through the transparent lid to a high-intensity ultra- violet light (wavelength 2537 ?). eprom erasure before pro- gramming is necessary to ensure that all bits are in the logic- high state. logic-lows are programmed into the desired loca- tions. a programmed logic-low can be erased only by ultra- violet light. the recommended minimum exposure dose (uv intensity x exposure time) is 15w?s/cm 2 . a typical 12mw/ cm 2 , filterless uv lamp erases the device in 21 minutes. the lamp should be located about 2.5cm above the chip during erasure. after erasure, all bits are in the high state. it should be noted that normal ambient light contains the correct wave- length for erasure; therefore, when using the as27c256a, the window should be covered with an opaque label. flashrite pulse programming the as27c256a eprom is programmed by using the amd flashrite pulse programming algorithm as illustrated by the flowchart in figure 1. this algorithm programs the device in a nominal time of 4 seconds. actual programming time varies as a function of the programmer used. data is presented in parallel (eight bits) on pins dq0 to dq7. once addresses and data are stable, e\ is pulsed. the flashrite pulse programming algorithm uses initial pulses of 100 microseconds (s) followed by a byte-verifica- tion step to determine when the addressed byte has been suc- cessfully programmed. up to 25 100s pulses per byte are provided before a failure is recognized. the programming mode is achieved when v pp = 12.75v, v cc = 6.25v, g\ = v ih , and e\ = v il . more than one device can be programmed when the devices are connected in parallel. locations can be programmed in any order. when the amd flashrite pulse programming routine is completed, all bits are verified with v cc = v pp = 5v. program inhibit programming can be inhibited by maintaining a high-level input on e\. program verify programmed bits can be verified with v pp = 12.75v when g\ = v il , and e\ = v ih . signature mode the signature mode provides access to a binary code identifying the manufacturer and device type. this mode is activated when a9 is forced to 12v 0.5v. two identifier bytes are accessed by a0 (terminal 10); i.e., a0=v il accesses the manufacturer code, which is output on dq0-dq7; a0=v ih accesses the device code, which is also output on dq0-dq7. all other addresses must be held at vil. each byte contains odd parity on bit dq7. the manufacturer code for these de- vices is 01h and the device code is 10h.
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 5 austin semiconductor, inc. figure 1. flashrite pulse programming flowchart start address = first location vcc=6.25v, vpp=12.75v x = 0 program one 100us pulse increment x programming section x = 25 ? yes no program fail verify byte? pass last increment address no address? yes vcc = vpp = 5.25v read read verify verify fail device failed section bytes? pass device passed
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 6 austin semiconductor, inc. *stresses greater than those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the op- eration section of this specification is not implied. expo- sure to absolute maximum rating conditions for extended peri- ods may affect reliability. ** all voltage values are with respect to gnd. absolute maximum ratings* supply voltage range, v cc **...........................-0.6v to +7.0v supply voltage range, v pp **...............................-0.6v to +13.5v input voltage range, all inputs except a9 ** ..-0.6v to +6.0v a9.....-0.6v to +13.5v output voltage range**...............................-0.6v to v cc +.6v minimum operating free-air temperature, t a ..............-55c maximum operating case temperature, t c ...................125c storage temperature range, t stg .....................-65c to 150c recommended operating conditions notes: 1. v cc must be applied before or at the same time as v pp and removed after or at the same time as v pp . the deivce must not be inserted into or removed from the board when v pp or v cc is applied. 2. v pp can be connected to v cc directly (except in the program mode). v cc supply current in this case would be i cc2 + i pp1 . electrical characteristics over recommended ranges of supply voltage and operating free-air temperature notes: 1. typical values are at t a =25c and nominal voltages. 2. this parameter has been characterized at 25c and is not tested. min typ max 4.5 5 5.5 6 6.25 6.5 v cc -0.6 12.5 12.75 13 ttl inputs 2.2 v cc +.6 cmos inputs v cc -0.2 v cc +.6 ttl inputs -0.5 0.8 cmos inputs -0.5 0.2 v id 11.5 12 12.5 t a -55 t c +125 v cc read mode 1 flashrite pulse programming algorithm supply voltage read mode 2 flashrite pulse programming algorithm v pp high-level input voltage v ih supply voltage v il low-level input voltage operating free-air temperature operating case temperature voltage level on a9 for signature mode test conditions min typ 1 max unit v oh i oh = -400a 2.4 v v ol i ol = 2.1ma 0.4 v i i v i = 0v to 5.5v 1 a i o v o = 0v to v cc 5 a i pp1 v pp = v cc = 5.5v 100 a i pp2 v pp = 13v 30 50 ma ttl-input level v cc = 5.5v, e\=v ih 1ma cmos-input level v cc = 5.5v, e\=v cc 300 a i cc2 v cc supply current (active) '27c256-12 '27c256-15 '27c256-17 '27c256-20,-25 e\=v il , v cc =5.5v t cycle = minimum, outputs open 15 25 ma parameter i cc1 v cc supply current (standby) high-level output voltage low-level output voltage input current (leakage) v pp supply current output current (leakage) v pp supply current (during program pulse) 2
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 7 austin semiconductor, inc. capacitance over recommended ranges of supply voltage and operat- ing free-air temperature, f = 1mhz* * capacitance measurements are made on a sample basis only. ** typical values are at t a = 25c and nominal voltages. switching characteristics over recommended ranges of supply volt- age and operating free-air temperature 1,2 notes: 1.timing measurements are made at 2v for logic high and 0.8v for logic low (see figure 2). 2. common test conditions apply for t dis except during programming. 3. value calculated from 0.5v delta to measured output level. this parameter is only sampled and not 100% tested. test conditions typ** max unit c i input capacitance v i = 0v 610pf c o output capacitance v o = 0v 10 14 pf parameter min max min max t a(a) access time from address 120 150 ns t a(e) access time from e\ 120 150 ns t en(g)r output enable time from g\ 40 50 ns t dis disable time of output from g\ or e\, whichever occurs first 3 0 30 0 30 ns t v(a) output data valid time after change of address, e\, or g\, whichever occurs first 3 00 ns parameter -12 see figure 2 -15 unit test conditions 1, 2 min max min max min max t a(a) access time from address 170 200 250 ns t a(e) access time from e\ 170 200 250 ns t en(g)r output enable time from g\ 50 60 60 ns t dis disable time of output from g\ or e\, whichever occurs first 3 040050060 ns t v(a) output data valid time after change of address, e\, or g\, whichever occurs first 3 000 ns see figure 2 -25 unit test conditions 1, 2 parameter -17 -20 switching characteristics for programming: v cc = 6.5v and v pp = 12.75v (amd flashrite algo), t a = 25c min max unit t dis(g) output disable time from g\ 0 130 ns t en(g)w output enable time from g\ 150 ns parameter
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 8 austin semiconductor, inc. recommended timing requirements for programming: v cc = 6.5 and v pp = 12.75v (amd flashrite algo), t a = 25c (see figure 2) min typ max unit t h(a) 0s t h(d) 2s t w(e)pr 95 100 105 s t su(a) 2s t su(g) 2s t su(e) 2s t su(d) 2s t su(vpp) 2s t su(vcc) 2s hold time, address hold time, data setup time, address pulse duration, initial program setup time, v cc setup time, g\ setup time, e\ setup time, data setup time, v pp parameter measurement information notes: 1. c l includes probe and fixture capacitance. 2.08v output under test r l = 800 ? cl = 100 pf 1 figure 2. load circuit and voltage waveforms the ac testing inputs are driven at 2.4v for logic high and 0.4v for logic low. timing measurements are made at 2v for logic high and 0.8v for logic low for both inputs and outputs.
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 9 austin semiconductor, inc. figure 3. read-cycle timing figure 4. program-cycle timing (flashrite pulse programming)
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 10 austin semiconductor, inc. mechanical definition* *all measurements are in inches. asi case #110 (package designator j) s2 a q l e b b2 s1 min max a --- 0.232 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 d --- 1.490 e 0.500 0.610 ea e l 0.125 0.200 q 0.015 0.060 s1 0.005 --- s2 0.005 --- symbol 0.100 bsc smd specifications 0.600 bsc ea c d e
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 11 austin semiconductor, inc. asi case #208 (package designator eca) mechanical definitions* *all measurements are in inches. b1 detail a e1 l1 b d1 l see detail a e e d a m i n m a x a 0.060 0.120 b 0.022 0.028 b1 0.006 0.022 d 0.442 0.458 d1 e 0.540 0.560 e1 e l 0.045 0.055 l1 0.075 0.095 0.050 bsc s y m b o l s m d s p e c i f i c a t i o n s 0.300 bsc 0.400 bsc
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 12 austin semiconductor, inc. ordering information *opera ting tempera ture m = extended temperature range -55 o c to +125 o c i = industrial temperature range -40c to +85c note 1: a v ailable processes /mil = denotes mil-std-883c process methods used but non-compliant to para 1.2.1. blank = denotes commercial process example: as27c256a-30jm/mil device number speed package type operating temp. available processes as27c256a -55 j * note 1 as27c256a -70 j * note 1 as27c256a -90 j * note 1 as27c256a -12 j * note 1 as27c256a -15 j * note 1 as27c256a -17 j * note 1 as27c256a -20 j * note 1 as27c256a -25 j * note 1 example: as27c256a-15ecam device number speed package type operating temp. available processes as27c256a -55 eca * note 1 as27c256a -70 eca * note 1 as27c256a -90 eca * note 1 as27c256a -12 eca * note 1 as27c256a -15 eca * note 1 as27c256a -17 eca * note 1 as27c256a -20 eca * note 1 as27c256a -25 eca * note 1
uveprom uveprom uveprom uveprom uveprom as27c256a as27c256a rev. 1.1 6/05 austin semiconductor, inc. reserves the right to change products or specifications without notice. 13 austin semiconductor, inc. asi to mil process part number examples asi package designator j asi p ar t # asi mil pr ocess par t# as27c256a-12jm as27c256a-12jm/mil as27c256a-15jm as27c256a-15jm/mil as27c256a-17jm as27c256a-17jm/mil as27c256a-20jm as27c256a-20jm/mil as27c256a-25jm as27c256a-25jm/mil asi package designator eca asi p ar t # asi mil pr ocess par t# as27c256a-12ecam as27c256a-12ecam/mil as27c256a-15ecam as27c256a-15ecam/mil as27c256a-17ecam as27c256a-17ecam/mil as27c256a-20ecam as27c256a-20ecam/mil as27c256a-25ecam as27c256a-25ecam/mil

▲Up To Search▲

Price & Availability of AS27C256A-70JI

	To Download AS27C256A-70JI Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .